Research on nanotubes has made significant strides in a relatively short time. Reports on successful growth and characterization of carbon nanotubes are abundant. Theory and computer simulations have predicted extraordinary properties for these nanotubes. The nanotube research community is excited about a wide range of applications which has been pulling more and more researchers into the arena. The time is ripe to seriously examine the potential of this emerging field. A joint Semiconductor Research Corporation / NASA Ames Workshop was conducted at NASA Ames Research Center on November 12-13, 1998 to explore and develop long term strategy for research in nanotubes that addresses the post-100 nm needs of the microelectronics industry and the needs of the display industry. The workshop consisted of two organized sessions:

(1) Future of Nanoelectronics: evolution or revolution

(2) Nanotubes research

The workshop concluded with a discussion session to identify challenges and opportunities ahead for nanotube research. This document summarizes the outcome of the workshop and consists of the workshop announcement with the agenda, workshop report, and summary of feedback from the participants.

We wish to extend special thanks to those who worked behind the scenes to assure the success of this workshop. Special thanks goes to the Workshop Planning Committee members Prof. Hongjie Dai, Prof. Otto Zhou, Prof. Don Brenner, and Prof. John Hren. Along with colleagues from NASA Ames, Ms. Marcia Redmond and Ms. Amara

de Keczer of NASA Ames, and Ms. Sandra Church of the SRC, provided excellent administrative and logistical support. Finally, thanks to all participants for their preparation and openness during the presentations and discussions.

Dan Herr Semiconductor Research Corporation

M. Meyyappan NASA Ames Research Center

Victor Zhirnov Semiconductor Research Corporation

Emerging Issues and Opportunities in Nanotubes and Nanoelectronics

November 12-13, 1998

NASA Ames Research Center, Mountain View, CA

The Semiconductor Research Corporation (SRC) and NASA Ames Research Center have organized this workshop to explore and develop a long-range strategy for research in nanotubes that addresses the post-100 nm needs of the microelectronics industry and the needs of the display industry. This workshop serves as a forum to build bridges between colleagues in the "nanotube community" and the "semiconductor community", and includes fields such as patterning, metrology, field emission, etc. The main question to be answered is: What scientific directions and results in nanotube research represent emerging and strategic breakthrough opportunities in semiconductor technology?

The aim of the workshop is twofold:

• To educate the carbon nanotube [CNT] community on nanoscale device, materials, process, and infrastructure technology requirements incorporating perspectives from practicing engineers and industrial researchers;
• To educate the semiconductor and related communities on the status and potential of carbon nanotubes.

The desired outcome of this workshop is a cohesive strategic plan that provides a detailed, prioritized technical agenda and timeline for collaborative research between the nanotube and semiconductor communities. This plan would include a clearly defined vision, goals, and boundary conditions for university, industry, and national laboratory research programs.

• Rational design of nanotubes, correlations between structure, properties, and limits;
• Measurements of electronic and emission properties from a single nanotube;
• Experimental demonstration of metallic, semiconductor, and insulating behavior of nanotubes;
• Can nanotubes be used as interconnects? Devices? Probes? Emitters?
• Is it possible to build Single-Electron Memory based on nanotubes?
• New circuit and chip architecture - are revolutions expected?
• Controllable and reproducible growth of nanotubes with desirable properties and helicity; (Most samples now are mixtures of single- and multi-walled nanotubes with widely varying electrical properties);
• Understanding of emission mechanism. Is this similar to diamond? Graphite?
• Operation stability (endurance) and reliability issues;

AGENDA

Thursday, November 12, 1998

8:00 AM Registration

8.30 AM Opening Remarks: Creation of straw mission M. Meyyappan/D. Herr

9:00 AM Session I. Future of Nanoelectronics: Evolution or Revolution ?

9:00-9:45 What is a device and an integrated circuit? C. Hu/UC Berkeley

Overview of ULSI devices, architecture and physics

9:45-10:30 Overview of silicon microelectronics: state of the art and technology trends S. Hillenius/Lucent

10:30-10:45 Break

10:45-11:30 Emerging challenges in microelectronics H. Stork/HP

Includes:

Devices and Fabrication

Interconnects

Metrology/Diagnostic

Reliability problems due to high integration density

Noise due to size reduction

11:30-12:15 Research Opportunities R. Doering/TI

- Fabrication of arrays of CNT diodes and transistors

- New approaches to fabrication: microtool arrays

- Demonstration of reproducibility of process and device characteristics

- Feasibility of nanotubes as interconnects

- Demonstration of feasibility of CNT nanoprobes for metrology diagnostics

- Long-term operation of CNT devices - aging effects

- Limits and trade-offs

12:15-1:00 Lunch

1:00 PM Session II. Nanotubes, their role in silicon microelectronics, and carbon nanotube-based nanoelectronics

1:00-1:30 Introduction to nanotubes - B. Yacobson/RPI

1:30-2:00 Structural and mechanical properties of CNTs - D. Brenner/NCSU

2:00-2:30 Electronic and magnetic properties - A. Zettl/UC-Berkeley

2:30-3:00 Electron emission properties - W. Zhu/Lucent

3:00-3:30 Synthesis and characterization of nanotubes - O. Zhou/UNC-CH

3:30-3:45 Break

3:45-4:15 Patterned growth and CVD - H. Dai/Stanford

4:15-4:45 Nanolithography - C. Quate/Stanford

4:45-5:15 Device Applications - C. Dekker/Delft U. of Tech.

5:15-5:45 Functionalization with chemical modification for metrology - R. Jaffe/NASA

5:45-6:00 Instruction for Session III - M. Meyyappan and D. Herr

Friday, November 13, 1998

8:00 AM Session III. Discussion, Prioritization, and Consensus on Research Strategy and Agenda

12:00 Workshop Adjourns

A joint SRC/NASA Ames Workshop on Emerging Opportunities and Issues in Nanotubes and Nanoelectronics was conducted at NASA Ames Research Center, Moffett Field, in Mountain View, California on November 12 and 13, 1998. Its purpose was to explore and develop a long-range strategy for research in nanotubes that addresses the post-100 nm needs of the microelectronics industry and the needs of the display industry. This workshop served as a forum to build bridges between colleagues in the "nanotube community" and the "semiconductor community," and covered fields such as patterning, metrology, field emission, and nanoelectronics. The main question considered was: What scientific directions and results in nanotube research represent emerging and strategic breakthrough opportunities in semiconductor technology? The 54 attendees were scientists and engineers from domestic IC manufacturers, emerging nanotube supplier community, universities, and national laboratories. The high attendance reflected the importance and critical nature of the issues to the domestic semiconductor community.

The need for this workshop grew from the Grand Challenges recognized in the Semiconductor Industry Association (SIA) 1997 National Technology Roadmap for Semiconductors [NTRS], specifically:

• The ability to continue affordable scaling;
• Affordable lithography at and below 100 nm
• New materials and structures;
• Ghz frequency operation on- and off-chip;
• Metrology and test;
• The research and development challenge.

During the past year, the SRC and NASA Ames began a dialog on the potential of nanotube technology to address these Grand Challenges. This effort has launched several modest high risk projects with significant breakthrough potential. Based on these initial successes, this workshop focused on addressing generic, precompetitive research issues and developing an agenda for long-term university and national laboratory research on advanced nanotube materials and architectures. The desired outcome was a cohesive strategic plan that provides a detailed, prioritized technical agenda and timeline for collaborative research between the nanotube and semiconductor communities. This plan would include a clearly defined vision, goals, and boundary conditions for university, industry, and national laboratory research networks. Among the workshop's exciting outcomes was the rapport shared by attendees and the consensus achieved regarding priority issues and a potential agenda.

Issues, perspectives, and strategic needs and opportunities were explored in three workshop sessions, covering: (1) The future of nanoelectronics: evolution or revolution?; (2) Nanotubes, their role in silicon microelectronics, and carbon nanotube-based nanoelectronics; and (3) Discussion, prioritization, and consensus on research strategy and agenda.

The first session provided a tutorial for the carbon nanotube [CNT] community on nanoscale device, materials, process, and infrastructure technology requirements, incorporating perspectives from practicing engineers and industrial researchers, and included:

• [C. Hu/UC Berkeley] What is a device and an integrated circuit?

• [S. Hillenius/Lucent] Overview of silicon microelectronics: state of the art and technology trends. It may happen that the exploding cost of building future generation MOS IC fabrication facilities will be a real limitation and will slow the exponential evolution rate of silicon technology;

• [H. Stork/HP] Emerging challenges in microelectronics: devices and fabrication, interconnects, metrology/diagnostic, reliability problems due to high integration density, and noise due to size reduction;

• [R. Doering/TI] Research Opportunities, such as fabrication of arrays of CNT diodes and transistors; new approaches to fabrication - microtool arrays; demonstration of reproducibility of process and device characteristics; feasibility of nanotubes as interconnects; demonstration of feasibility of CNT nanoprobes for metrology diagnostics; long-term operation of CNT devices - aging effects, limits and tradeoffs;

These tutorials included brief summaries of current trends in semiconductor technology and a wish list for future materials and applications. The presenters shared projected performance assumptions, timing issues, and their vision of the state-of-the-art and future developments of nanoelectronics, and discussed prospects of carbon nanotubes (CNT) for nanoelectronic devices. Most of the speakers shared the opinion that MOSFET technology will be the driving architecture through the 40 nm generation. However, they also recognized that new methods for extending CMOS into higher levels of complexity, such as self-organized processes, are highly desired and highlighted areas that represent appropriate and high-leverage research opportunities for university activity. Other general ideas conveyed by the speakers in sessions can be summarized as follows:

• Design change is the most important issue for future microelectronics. New concepts for device architecture are required (e.g., smart routing, clockless logic, systolic arrays, self-powered circuits etc.);

• Since any innovations should build on the existing infrastructure, advanced development of the infrastructure (e.g., CAD etc.) to support the innovations is absolutely necessary;

• There are several advanced designs of MOSFETs that are more appropriate for CNT-based devices (e.g., double-gated, vertical structures etc.);

• More attention should be paid to self-assembly and other self-organizing processes, and potentially to biomolecular computing.

Specific potential opportunities and issues raised during the first session include:

• Bulk isotropic CNT-composites are expected to exhibit low density and could serve as a low-K dielectric insulator;

• High-conductivity CNTs have the potential of serving as self-supporting wires. Their inherent mechanical strength could eliminate the need for solid insulating layers;

• Could CNTs serve as multi-micron long, nanometer diameter interconnects? This would require that a CNT film would need to be deposited, patterned and etched with techniques compatible with the underlying silicon devices. Also, techniques have yet to be discovered to manipulate and attach an individual nanotube to the lead frame. What are the electrical properties and stability of CNTs at high current densities [~10⁶ A^.cm^-2?];

• CNTs might be engineered to act as passive devices, e.g., as capacitors for DRAMs and inductors for integrated circuits in RF systems. The ability to tune and control the range of conductivity, helicity, and radii represents a significant challenge;

• What is the potential of creating active electronic devices with CNTs? Any innovation here should meet the current standards, such as low cost (e.g., one µcent/transistor), high level of integration (e.g., 10⁹ transistors /circuit); high reproducibility (e.g., +/- 5% tolerance for device dimensions and electrical parameters) and reliability (e.g., operating lifetime >10 years). Measuring and characterizing the time-to-failure mechanisms and distributions, as functions of the significant stress parameters, represents a significant challenge;

• Nanotubes are likely to be used as components in metrology applications which warrant small area/volume measurements of dimensions and chemical composition for diagnostics, failure analysis, and R&D purposes;

• Niche applications: field emitters, STM tips;

• The affordability of manufacturing with nano-tools may depend upon the simplification and integration of our traditional approach to unit processing. The feasibility of micro-tool arrays to address this challenge requires that they be sufficiently fast, flexible, and inexpensive. However, alternative approaches, such as chemical or biochemical based self-assembly may become competitive from an estimated cost standpoint.

Session II provided a corresponding tutorial for the semiconductor and related communities on the status and potential of carbon and related nanotubes. Topics covered included:

• [B. Yakobson/RPI] Introduction to nanotubes;

• [D. Brenner/NCSU] Structural and mechanical properties of CNTs;

• [A. Zettl/UC-Berkeley] Electronic and magnetic properties;

• [W. Zhu/Lucent] Electron emission properties;

• [O. Zhou/UNC-CH] Synthesis and characterization of nanotubes;

• [H. Dai/Stanford] Patterned growth and CVD;

• [C. Quate/Stanford] Nanolithography;

• [C. Dekker/Delft U. of Tech.] Device Applications;

• [R. Jaffe/NASA Ames] Functionalization with chemical modification for metrology.

Speakers in this session summarized the state-of-the-art in theory and experiments related to nanotube research. The heavy emphasis at present on molecular models and dynamic system simulations served to highlight fundamental knowledge gaps. The need for experimental validation and a more fundamental understanding of nanotube chemistry and kinetics, rather than an empirical approach to nanotube growth, was indicated. The speakers proposed paradigm shifts in device, metrology, and patterning. Noteworthy ideas and results from these presentations include:

• Simulation of properties: In general, the simulation results are outstanding! They suggest that CNTs may have very high electrical and thermal conductivities and ultimate mechanical strength. Electrical properties of CNTs apparently can be changed from metallic to semiconducting or insulating by varying the structure (e.g., helicity) of the CNT. In principle, devices could be fabricated from these components.

• Fabrication: It appears unlikely that CNT technology will be inserted into device architecture and semiconductor manufacturing before the 40 nm generation. Current disadvantages of fabricating with CNTs are:

1. The temperature required for CNT growth is typically ~1200 C, which is too high to be compatible with Si technologies. Note that lower temperature CVD fabrication processes, ~500C, have been recently demonstrated. The properties of the resulting nanotubes grown at low temperatures have yet to be characterized.
2. The properties of individual CNTs synthesized in the same process can be very different.

• Properties: Much remains to be learned about the electrical properties of CNTs. Limited results were mentioned regarding the I-V characteristics of individual CNTs and their potential as semiconductors. Data on resistivity, stability at high current densities, reliability of electrical measurements, or the influence of environment on the electrical characteristics, etc. were neither presented nor discussed. Fortunately, several members of the nanotube community recognize the challenge of and need for reliable measurements.

• Devices: A FET structure with a nanotube as a channel was discussed. However, the transistor action was not fully demonstrated as the maximum gain was only 0.35 and the output characteristic did not exhibit a saturation region, typical for MOSFETs.

• Emitters: The electron emission properties of nanotubes were discussed. To increase the visibility of the potential of CNTs as electron emitters, the nanotube community is encouraged to present nanotube field emission results at one or more of the following conferences: International Vacuum Microelectronics Conference, International Field Emission Symposium, International Vacuum Electron Source Conference, and similar forum. This will engage other colleagues in the emitter community and facilitate dialog and feedback on the progress of nanotube technology and its relative and emerging potential as a competitive emitter technology.

• Probes: Results on nanotubes as probes in Scanning Probe Microscopes are encouraging. Some members from semiconductor community expressed doubts about the potential of scanning probe lithography in general. Nevertheless, a demonstration of parallel array of high resolution probes (50 tips) achieved to date represents an interesting and possible breakthrough technology for addressing sub-50 nm metrology and lithography issues. Attachment of an individual CNT to a cantilever on a scanning probes represent a significant challenge. Today this is done by manipulation of individual nanotubes.

• Customization and Functionalization: The ability to create a chemically sensitive nanoscope represents a significant advance in the state of sensor development. The importance of such an instrument at first would be for biological systems (e.g. DNA). However this capability would also be extremely important for diagnostics and addressing nanoelectronic devices and components.

During the round-table discussion, participants defined a long-term agenda for research in nanotube materials, architecture, and applications. Questions and challenges raised include:

• Growth, Structure, and Property related issues:

• Understanding rate limiting growth mechanisms

• Don't need 'tons a day' but controlled and reproducible growth or patterns
• Select chirality and grow it vs "taking whatever that comes"
• Spaghetti-like structure vs a "3-day beard" or a "shoe-brush" on the SEM image
• What do you do with all the catalyst particles on the substrate at the bottom of the tubes? How will this impact device operation? Can it be removed? Can the catalyst serve as a contact, e.g. Au?

• Rational design of nanotubes - correlations between structure, properties, and limits;

• Controllable and reproducible growth of nanotubes with desirable properties and helicity; (Most samples now are mixtures of single- and multi-walled nanotubes with widely varying electrical properties);

• Electronic Properties:

• Measurements of electronic and emission properties from a single nanotube;

• Understanding, experimental demonstration, and control of metallic, semiconductor, and insulating behavior of nanotubes;
• Impact of defects on electronic properties
• Understanding of emission mechanism. Is this similar to diamond? Graphite?
• Applications and architecture:

• Metrology:

• Grow CNTs on cantilevers?
• Profilometer?
• Characterization and identification of particles in processing chambers?
• Chemical sensors?

• Nanolithography using scanning probes

• Can nanotubes be used as interconnects? Devices? Probes? Emitters?

• Operation stability(endurance) and reliability issues;

• New circuit and chip architecture - are revolutions expected?

• Is it possible to build Single-Electron Memory based on nanotubes?

Participants identified and reached consensus on the following strategic research opportunities during the round table discussion and caucus:

• Growth related challenges

• Other novel synthetic growth mechanisms, in addition to gas phase methods
• Non-carbon nanotube growth
• growth and transfer to substrate
• new tools for nano manipulation during growth
• nanotubes for low K dielectrics
• understand growth properties, reproducibility, and control
• wiring for interconnect and contact formation
• semiconductor compatible catalysts? Cs-based growth at or near room temp.?
• tradeoff between insitu vs external growth and placement
• Are multiwalled tubes [MWT] useful? Best uses for MWTs? Difference in electron emission and electrical properties between MWT and single walled nanotubes?

• metrology: profilometry; microetching/deposition; mechanical studies for AFM; metrology standard; rapid characterization techniques, electron sources for SEM; other metrology methods; electron emission properties;

• sensors : functionalized/customized tips; identify composition of particles in process chambers; intercalation for battery applications;

• Modification and characterization of electronic properties

• Nanoamplifier, FET, gain>1

• Longer term research opportunities:

• Carbon-electronics

• Nanotube bio-electronics

• fundamental understanding of principles for self assembly

• Multijunction devices

• Competetive metallic wires

• Bio compatibility

• Local interconnect-nearest neighbor strategy

• Understanding the interaction between structure, mechanical, and electronic properties

• Bandgap engineering
• Nanotube - substrate interaction engineering; What is the ideal substrate?

• Optical properties and optoelectronic applications

• Drop-ins for insertion into silicon semiconductor technology architecture

• Design architecture for nanotubes

• Anisotropic, additive processes

• Self powered systems

Discussions continued on how the semiconductor industry, university community, national laboratories, and supplier companies could best network and leverage existing resources to explore the most strategic opportunities and address the most critical needs. Materials and applications that meet the needs of several technology nodes were deemed preferable to single use.

Workshop participants reviewed the draft report and reached consensus on prioritizing the research opportunities listed above. All participants were asked to caucus within their respective organizations and generate a prioritized list of strategic opportunities for long-term university research on nanotube related technologies. During this period, participants were invited to amend this list as needed. Results from this survey are summarized in the next section.

This workshop provided the first forum enabling colleagues from domestic IC manufacturers, the emerging nanotube supplier community, universities, and national laboratories to interact on common issues and needs related to breakthrough opportunities in nanotubes and nanoelectronics. To provide a continued forum for sharing research advances, the organizers have contacted American Vacuum Society (AVS) and a topical conference with the same title as this workshop has been planned for the AVS Annual Meeting in Seattle on October 25, 1999.

The organizers highly appreciate the thoughtful comments and suggestions from the participants, which reflect the growing interest of U.S. industry, academic researchers and government institutions in the practical implementation of nanotubes in micro-and nano-electronics. This feedback will help to prioritize future research directions. The comments from participants thus far are given below. A first pass prioritization of research topics based on this feedback is listed in Table 1 later.

My prioritization of the the research topics for Carbon Nanotubes is the following:

1. Emitter Applications for Lithography,
2. Low-K dielectrics ILD applications,
3. Self-assembly fabrication techniques using CNTs,
4. Electrical properties and their systematic control, and
5. Metrology applications (Probes, nanoscope, etc.)

The following is my top five prioritized list of research opportunities from the list provided in the document. The text outlining the research opportunities was cut and pasted from the document. The bold text is my comments clarifying the reason(s) for each choice:

1. Growth related discussions for semiconductor applications

Of the listed sub-areas, in particular:

• Growth and transfer to substrate
• Understand growth properties, reproducibility, and control
• Wiring for interconnect and contact formation

2. Modification and characterization of electronic properties

This is clearly a necessary step toward a majority of microelectronic applications.

3. Metrology: profilometry; microetching/deposition; mechanical studies for AFM; metrology standard; rapid characterization techniques, electron sources for SEM; other metrology methods; electron emission properties;

This was expressed as a priority by the representatives from the microelectroncs industry. I hadn't appreciated this before the workshop.

4. Bio compatibility;

From my perspective, I really think there are only two main issues that require serious new funding (see below). Until techniques are available to reliably address these two issues, most of the research on nanotubes will be of a serendipitous nature. This type of research has already convinced hundreds (maybe even thousands?) of scientists world-wide that nanotubes are interesting. (I think much of the ancillary work like putting nanotubes on cantilevers, theoretical properties of nanotubes, nanopencil using nanotubes, etc. will continue without the need for extensive new support. Most of this work seems to be part of existing programs that are already well funded).

1. Controllable and reproducible growth of nanotubes with desirable properties and helicity; (Most samples now are mixtures of single- and multi-walled nanotubes with widely varying electrical properties);
2. Electronic Properties: reliable measurements of electronic and emission properties from a single nanotube.

4. Hans Stork / Hewlett-Packard

There is a prioritized list of activities that I would vote for:

1. Growth related efforts:

other novel synthetic growth mechanisms, in addition to gas phase methods non-carbon nanotube growth

growth and transfer to substrate

new tools for nano manipulation during growth

spaghetti for low K dielectrics

understand growth properties, reproducibility, and control

semiconductor compatible catalysts; Cs-based growth at near room temp

tradeoff between insitu vs. external growth and placement

2. Patterning & handling: conformal patterning; increase throughput, registration; masks; bulk applications; sorting wrt strucuture; opening and closing ends
3. Understanding the interaction between structure, mechanical, and electronic properties - Bandgap engineering; nanotube-substrate interaction engineering; defect understanding
4. Characterization and modification and of electronic properties. Intrinsic properties measurement and modeling.
5. Carbon-electronics, from 2D (resistors, inductors, capacitors, diodes) to 3D (transistors)

Here's my quick 'top 5' for priorities:

1. Control of chirality in growth
2. Progress towards carbon electronics, in particular at the molecular scale - devices from nanotubes:
3. Short term: field emission devices and scanning probe tips
4. Longer term: see previous point, research on single-nanotube devices (kinks for example) - explore electromechanical effects
5. fabricate high-strength (and conducting) fibers [but this is not necessarily important for microelectronics]

One other note: I think bio-compatibility is really a step too far ahead, and would not emphasize this at this stage.

1. Nanotubes/polymer composites as a new optoelectronic material.
2. Nanotubes for ultra-fine scale etching, indentation, patterning, and lithography.
3. Nanotubes as a new ultra-light and ultra-hard material for mechanical applications.
4. Nanotubes as a new zeolite-type material for storage.
5. Nanotubes/junctions as the alternative electronic devices.

7. Hal Bogardus / SEMATECH

Priorities:

1. Probe tips: AFM, profilometer
2. Electron emission properties: SEM, tips for electronholography
3. Applications to semiconductors: low K dielectric, etc
4. Electronic and optical properties
5. Controlled growth

The top five most promising uses that appear are:

1. Spaghetti for low K dielectrics
2. Growth related discussions for semiconductor applications
3. Sensors: functionalized/customized tips; identify composition of particles; intercalation for battery applications; material specific. Modification and characterization of electronic properties
4. Non-carbon nanotube growth
5. Are multiwalled tubes [MWT] useful? Best uses for MWTs? Difference in electron emission and electrical properties between MWT and single walled nanotubes?

1. Nanotube bio-electronics
2. Fundamental understanding of principles for self assembly
3. Self powered
4. Bio compatibility;
5. Understanding the interaction between structure, mechanical, and electronic properties

9. Rod Ruoff / University of Washington at St. Louis

1. Creation and testing of active devices comprised only of nanotubes

1. field effect transistors
2. diodes
3. fundamental research on how to locally change the density of states:

1. by chemical functionalization at specific sites
2. by geometric distortion at specific sites
3. by doping (replace C with B or N, for example)
4. by placing other NTs perpendicular and applying fields (field effect creation of quantum wells might be possible).

2. Design and use of new tools for manipulation and placement of nano-sized objects such as nanotubes.
3. R&D on chemically based self-assembly or directed self-assembly-laying the stage for the large-scale production of active (and passive) devices based on nanotubes.
4. Use of nanotubes as components in circuitry, such as long, nanometer diameter interconnects.
5. Use of NT-composites for low-K dielectric behaviour, and for heat management.

10. James R. Von Ehr II / President & CEO Zyvex

Rather than rank the items on the list, I'd like to propose an alternative that we are working towards at Zyvex. I think it is premature to spend much effort on trying to make electronic devices from nanotubes. I'd rather see research go into nanotube manipulation, mechanics, and ordered growth. Until we can reliably and efficiently grow, mani pulate, and join nanotubes together, we probably won't make interesting, real-world electronic devices. Such devices are unlikely to be made by self-assembly processes, and lithography doesn't seem appropriate to nanotube manipulation, so direct mechanical assembly is the most flexible and general technique for making useful structures. Today we lack the manhinery to do this.

Improving our ability to manipulate nanotubes makes building electronics (or novel materials of interest to NASA) easier. The converse is not true. Thus, in my opinion, nanotube manipulation should be the main goal, with nanoelectronics as an interesting area to spend but a small effort on.

Here are my "top five" research priorities from the workshop list:

1. Spaghetti (or any other "bulk thin film" form) for low-k dielectrics,
2. Understand growth properties, reproducibility, and control,
3. (3) Growth and transfer to substrate (or, better yet) growth on substrate,
4. Non-carbon nanotube growth, and
5. Patterning (e.g., use in multi-tip AFM lithography).

Long-term work related to "self-assembly" and general synergy between biochemical and nanoelectronic technologies is also of interest.

12. Ronald P. Andres / Purdue University

Below are what I feel are the five most important research areas to fund at the present time. These choices are based on their potential for significantly impacting the miroelectronics industry.

1. CNT Based Probes:

Developed CNT based probes for characterizing 3-D morphology, chemical composition, electronic characteristics, and magnetic characteristics of solid substrates at the nanometer scale.

2. Electron Emitters for Display Devices:

Measure the field emission characteristics of single, well-characterized CNT's.

3. CVD Synthesis:

1. Achieve low temperature synthesis of a CNT from a single, well-characterized metal cluster.
2. Study the properties of CNT's grown in this way and the electronic characteristics of the metal cluster/CNT interface.

4. Self-assembly of CNT/Silicon Structures with interesting morpholgy:

1. Grow single CNT's directed normal to a Si surface.
2. Grow CNT's that interconnect two regions of a Si substrate.

5. Synthesize CNT samples with uniform properties, i.e. either single walled or multiwalled (with controlled number of walls) that all have the same diameter and helicity.

13. Boris I. Yakobson / North Carolina State University

1. "Growth by measure": detailed study of growth conditions, how those affect the product, and how the correlations can be incorporated into sentient theoretical models, to further improve the synthesis.
2. Bandgap engineering, uniform segments and heterogeneous sequences, especially by mechanically-induced tube-lattice modification.
3. Nanotube-substrate engineering, search for "ideal substrate", the one that doesn't alter the tube properties.
4. Non-substrate, "suspended" circuitry (light weight, 3D connectivity), issues of power dissipation limits should be understood.
5. High Q nanoresonators.
6. Intercalation, thermodynamics equilibrium and kinetics issues; feasbility for batteries.

14. Srinivas Manne / University of Arizona

It was a privilege and a learning experience to be part of this very interesting workshop. Having read through the summary document, I do not have any significant comments or corrections; it captures the spirit of the talks and discussions accurately.

Here are the top 5 nanotube-related research opportunities, as I see them.

1. Liquid-based synthesis, orientation, and placement of nanotubes. Almost all experimental work so far has relied on gas-phase growth and mechanical manipulation; the results are sometimes spectacular but often variable. Slow NT synthesis at modest temperatures in liquid media, and manipulation by self-assembly, are promising routes to greater reproducibility.
2. Control of length, helicity, and defect placement in individual nanotubes. These three issues are critical to the eventual use of individual NTs as nanoelectronic devices.
3. Facile placement or in-situ growth of a SINGLE nanotube on AFM probes,to be used as a metrology or lithography device,or to probe mechanical and electrical properties of NTs. (Arrays of thousands of NTs on cantilevers are less useful for these purposes.)
4. Environmental wear and decomposition of NTs. This subject was seldom addressed and will be critical to NT applications in real devices.This issue can be tackled in the general framework of chemical reactions and substitutions in and on nanotubes.
5. Catalysis mechanism in NT growth: base growth vs. tip growth.

15. Richard Jaffe/NASA Ames

Here are my top 5 areas:

1. Controlled growth of specific diameters and chiralities, amount of defects and functionalization (needed for nearly all conceivable applications)
2. Nanotube SPM tips for nanolithography and metrology
3. Understanding and control of emission mechanism for displays (probably nearest to commercial development)
4. Chemical sensors
5. Mechanical-electrical switches (MEMS) that capitalize on singular mechanical and electronic properties and do not require production in huge amounts as would other nanotube-based electronic devices

Nanotubes appear to have many interesting possibilities. I see them as near-term,like metrology and interconnect related, and long term in possible radical alternative devices.I would prioritize the tasks to provide some of each-Priority-nearterm-

1. Metrology applications
2. Spaghetti for low k
3. Wiring applications

Longer term-

4. Understanding interaction between structure, mechanical and electronic properties
5. Nanotube substrate engineering

I think thank that you did an excellent job getting the things moving. You have outlined the topics more or less already in your report. But I would like to stress a few as you suggested me to do.

1. To develop controlled preparation methods. This may include control and the understanding of novel growth techniques for nanotubes. The techniques such as CVD, MBE and laser oblation, etc may be used. The key is control as to date, the nanotubes we have seen are not suitable for electronics or optical applications.
2. Self-assembly of the nanotubes and self-registration. Can we prepare the tubes at the pre-designed locations? Can we control the length and the size of the nanotubes?
3. Integrated applications of nanotubes. We should be looking at the applications of nanotubes to be integrated with electronics, bio, and MEMS, bio-MEMS, and optoelectronics. This may include new sensors, new device physics and technology applications. The latter is particularly related to VLSI, for example, interconnects if one can place them exactly the locations one wishes. This should include the investigation of transport.
4. Investigation of electromechanical properties for nanotube MEMS applications. This may be integrated with future advanced CPU chip. The total integration with its advantageous mechanical and electronic properties all together may lead to new robotics or I should call it bionics.
5. Si- C electronics integration. Integration of Si and nanotube electronics

Table I. Initial prioritization rating of potential research topics based on feedback from 17 of the workshop attendees. If a topic was mentioned by at least two voters, then it was included in the table.

Growth-related issues represents the top priority research opportunity. It reflects the importance of reproducible and controllable manufacturing of nanotubes as building blocks of micro-(nano-) electronics. Electron emission and lithography related issues correspond to the second highest opportunity. This is a high risk area and faces many challenges. The third position in the table belongs to the problem of reliable characterization of electrical properties of CNTs. The importance of this topic was very strongly emphasized by Ron Reifenberger (Purdue University): "From my perspective, I really think there are only two main issues that require serious new funding [e.g.(1) and (3)]. Until techniques are available to reliably address these two issues, most of the research on nanotubes will be of a serendipitous nature."

Next rating belongs to nearer-term applications of nanotubes in microelectronics. These are "bulk thin film" form of nanotubes ("spaghetti") for low-k dielectrics and metrology applications of CNT-probes. It is important to note here the unexpected high rating of self-assembling approaches to nanofabrication - same as for the metrology and the low-K dielectrics. Interestingly, the needs for self-assembling approaches were addressed by representatives from all three "research branches", e.g. industry, academia and government agencies. This reflects a general shift in the attitude on manufacturing approaches.

We would like to note here some conflicting feedback. In some cases, a topic one voter selected as "first priority" is dismissed by other experts as not-realistic. For example, Cees Dekker believes that "bio-compatibility is really a step too far ahead, and I would not emphasize this at this stage", while other voters found this issue to be pretty timely. Also, James Von Ehr made a very strong program statement about nanomanipulation: "Until we can reliably and efficiently grow, manipulate, and join nanotubes together, we probably won't make interesting, real-world electronic devices. Such devices are unlikely to be made by self-assembly processes, and lithography doesn't seem appropriate to nanotube manipulation, so direct mechanical assembly is the most flexible and general technique for making useful structures.".

Only time will judge, whose opinion or approach turns out to be the most correct. For now, we can conclude that there is a very interesting research and application field emerging, and many exciting breakthroughs are ahead in the near future.